1. Field of the Invention
The present invention relates to a chalcogenide memory device, and more particularly to a chalcogenide memory device with multiple bits per cell.
2. Description of the Prior Art
The use of chalcogenide material in memory devices is well known in the art. For example, Ovshinsky et al. in U.S. Pat. No. 5,296,716 disclose the use of chalcogenide materials and provide a discussion of the current theory of operation of chalcogenide materials.
Chalcogenide material can be electrically switched between amorphous and crystalline states and exhibits different electrical characteristics depending upon its state. For example, in its amorphous state, the material exhibits lower electrical conductivity than it does in its crystalline state. Because chalcogenide material retains its programmed state even after removal of the electrical stimulus, chalcogenide memories are non-volatile. As an added benefit, chalcogenide elements may be programmed into two or more states. Thus, chalcogenide-based memories may operate as traditional binary memories or as higher-based memories.
The operation of chalcogenide memory cells requires that a region of the chalcogenide memory material, called the chalcogenide active region, be subjected to a current pulse typically with a current density between about 105 to 107 amperes/cm2, to change the crystalline state of the chalcogenide material within the active region contained within a small pore. Referring to FIG. 1, this current density may be accomplished by first creating a small opening 1 in a dielectric material 2 which is itself deposited onto a lower electrode material 3. A second dielectric layer 4, typically of silicon nitride, is then deposited onto the dielectric layer 2 and into the opening 1. The chalcogenide material 5 is then deposited over the second dielectric material 4 and into the opening 1. An upper electrode material 6 is then deposited over the chalcogenide material 5. Carbon is a commonly used electrode material although other materials have also been used, for example, molybdenum and titanium nitride. A conductive path is then provided from the chalcogenide material 5 to the lower electrode material 3 by forming a pore 7 in the second dielectric layer 4 by the well known process of popping. Popping involves passing an initial high current pulse through the structure which passes through the chalcogenide material 5 and then provides dielectric breakdown of the second dielectric layer 4 thereby providing a conductive path via the pore 7 through the memory cell.
The energy input required to adjust the crystalline state of the chalcogenide active region of the memory cell is directly proportional to the lateral dimension of the pore. That is to say, smaller pore sizes result in smaller energy input requirement. Conventional chalcogenide memory cell fabrication techniques provide a minimum lateral pore dimension limited by the photolithographic size limit. This results in pore sizes having minimum lateral dimensions down to approximately 1 micron.
Many researchers have attempted to solve the above problem. For example, Gilgen in U.S. Pat. No. 6,147,395 provides a chalcogenide memory with a small contact area between the chalcogenide element and electrode. Referring to FIG. 2, the chalcogenide memory includes, from the bottom to top, a substrate 20, a lower electrode 22 with a frusto-conical tip 30, a chalcogenide layer 34 in contact with the frusto-conical tip 30, a carbon layer 35, an upper electrode 36, and an upper conductive grid interconnect 40. Symbol 32 refers to an insulating layer and symbol 38 an interlayer dielectric (ILD) layer. Since the lower electrode 22 has a frusto-conical tip 30, the contact area between the chalcogenide layer 34 and the lower electrode 22 is made small. The small contact area provides minimum dimensions below the photolithographic limit, thereby reducing the required energy input to the chalcogenide active region in operation.
However, the conventional chalcogenide memory can store only one bit on one cell, thus, the memory density is not sufficient.